Computer Aids for VLSI Design
Steven M. Rubin
Copyright © 1994

Chapter 7: The Output of Design Aids

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7.1 Introduction

Computer-aided design systems must be able to communicate with the machines that manufacture and test circuits. This may seem obvious and is often taken for granted; without a good connection to such devices, however, the entire design system becomes a useless toy. The contents of the display screen are not acceptable input to manufacturing, nor are wallpaper-scale plots. These are strictly meant to help the designer visualize a circuit. Manufacturing and testing machines have their own descriptive formats, which all CAD systems must be able to generate.

There are many different manufacturing machines, most of which use vastly different input formats. There are several reasons for these different formats. First, specification formats tend to be optimized for the type of artifact being manufactured, ranging from integrated-circuit masks to printed-circuit and wire-wrap boards. Second, patent protection and other marketing factors often make standardization undesirable and impractical. Finally, technology is evolving at such a rate that machines and their interfaces are rapidly made obsolete.

Testers have traditionally been programmed independently of design systems, with little thought given to integration. Although some testers are designed to mimic simulators, the input formats are rarely standardized or properly connected to the design process.

Besides having the ability to communicate in all the necessary manufacturing and test formats, a good CAD system should be able to understand the many interchange formats that allow it to exchange designs with other CAD systems. These interchange formats not only allow free flow of design information, but also enable obscure manufacturing styles, understandable by a subset of CAD systems, to be accessible from other systems.

One common characteristic of manufacturing, testing, and interchange formats is that they are fundamentally unreadable to humans. These specifications are occasionally designed as binary bit streams, but more commonly as highly abbreviated text. It is unreasonable to expect designers to be able to manipulate this sort of text because it contains way too much detail about the exact geometry, topology, and functionality of the circuit. This overabundance of numbers is exactly the thing that design systems seek to avoid. There would be no need for these systems if designers were content to specify circuits in the manners described in this chapter. However, since CAD systems abound, these formats must not be intended for humans and remain to be used for only intermachine communication.

This chapter will discuss interfacing for the manufacturing of different types of electronic circuits. The first section on circuit boards discusses formats for wire-wrap, printed circuitry, and board drilling machines. The Integrated Circuit section covers interchange formats and manufacturing formats. The last section of the chapter describes implementation issues for VLSI circuits, including tester formats and a look at the MOSIS implementation service. Full details of the formats mentioned in this chapter can be found in Appendixes A through E.

Figure 7.1 is a table that summarizes the capabilities of the formats described in this chapter. Some formats are meant as interchange between CAD systems, some are for testing, and some are intended to be read directly by manufacturing machines. It is interesting to note that the interchange formats all support hierarchical description, whereas none of the manufacturing formats do. The table shows that some formats are in human readable text and others are purely binary. Also shown is the nature of the represented data-the extent to which they support topology, geometry, or behavior. Finally, the allowable types of geometry are shown--their ability to handle lines, polygons, circles, arbitrary curves, or text. The following sections provide detail for the table.

Wire-Wrap 
Gerber 
N.C. Drill 
CIF 
GDS II 
EBES 
EDIF 
SDIF 
CADDIF 

Type
Man
Man
Man
Int
Int
Man
Int
Test
Test
Hierarchy
N
N
N
Y
Y
N
Y
Y
N
Human-readable
Y
Y
Y
Y
N
N
Y
Y
N
Contents:
   Topology
Y
N
N
N
Y
N
Y
N
N
   Geometry
N
Y
Y
Y
Y
Y
Y
N
N
   Behavior
N
N
N
N
N
N
Y
Y
Y
Geometry:
   Lines
N
Y
N
N
Y
N
Y
N
N
   Polygons
N
Y
N
Y
Y
Y
Y
N
N
   Circles
N
Y
Y
Y
N
N
Y
N
N
   Curves
N
Y
N
N
N
N
Y
N
N
   Text
N
Y
N
N
Y
N
Y
N
N
FIGURE 7.1 Summary of output formats.


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Steven M. Rubin
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